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Computer Science Colloquia

Thursday, September 4, 2014
Vidyabhushan Mohan
Advisors: Mircea Stan and Kevin Skadron
Attending Faculty: Jack Davidson (Chair), Marty Humphrey and Jack Frayer (SanDisk)

1:00 PM, Rice Hall, Rm. 504

Ph.D. Proposal Presentation
Towards Building Energy Efficient, Reliable and Scalable NAND Flash Based Storage Systems

ABSTRACT

NAND Flash (or Flash) is the most popular solid-state non-volatile memory technology used today. Devices ranging from consumer electronics like smart phones, tablets and music players to laptops, workstations and servers use flash memory for their storage needs. As flash geometries shrink with each generation, power efficiency and reliability are significant issues facing flash memory storage systems. As smaller flash geometries drive flash storage device capacity to the peta-scale, the scalability of such storage systems is also becoming a major limitation. In this proposed dissertation, I will address the power, performance, and scalability challenges faced by flash based storage systems.

To address the power efficiency of flash memory, this dissertation presents FlashPower, a detailed analytical power model for two most popular variants of NAND flash, namely, Single-Level Cell (SLC) and Multi-Level Cell (MLC) based flash memory chips. Using FlashPower, this dissertation will provide detailed insights on how various parameters affect flash energy dissipation and propose architectural optimization that can reduce the power consumption of these memories.

To address the reliability issues of flash memory, this dissertation presents FENCE, a detailed transistor-level model to study various reliability issues that affect flash memories and analyze the trade-off between flash geometries and operation conditions like temperature and usage frequency. Using FENCE, this dissertation will propose both firmware and architecture level solutions to design reliable and application optimal storage systems.

Finally, to address scalability of large flash based storage devices, this dissertation will evaluate the bottlenecks faced by conventional centralized architectures to show that algorithms intended to increase NAND efficiency cannot execute effectively. This dissertation will propose FScale, a new distributed processor based storage architecture that can match the scaling rate of NAND flash memory and enable efficient peta-scale flash based storage systems.