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Computer Science Colloquia

Friday, April 6, 2012
Jiawei Huang
Advisor: John Lach
Attending Faculty: Gabriel Robins, chair; Scott Acton, Ben Calhoun, Joanne Dugan, and Sudhanva Gurumurthi

1:00 PM in Thornton C310, ECE Conference Room

Ph.D. Dissertation Defense
A Digital System Design Methodology for Efficiency-Quality Tradeoffs Using Imprecise Hardware

ABSTRACT

High power consumption has become a major barrier in the design of modern application-specific ICs (ASICs). Recent studies have demonstrated the potential for significant power reduction in ICs by allowing errors to occur during computation. While most existing techniques for achieving this rely on voltage-overscaling (VOS), it is only one example in the vast design space of Imprecise Hardware (IHW), which is capable of converting relaxed quality requirements into higher implementation efficiency.

First we present the generalized concept of IHW, of which VOS is an example. A mathematical approach to IHW characterization is introduced to quantify their error characteristics. We also present several novel IHW examples, including fidelity-compromising transformations at the algorithm level, imprecise adders and multipliers at the RTL level and the combined use of IHW and VOS.

Since IHW expands the design space of traditional HW by one dimension (quality), it is imperative to develop a fast and accurate quality evaluation method to efficiently explore this space. We propose a static error estimation method that propagates the statistical distribution of data and errors through a network of arithmetic operations. It can be used to estimate the quality metrics of an IHW implementation without the need of simulation.

Finally, two methodologies for exploring the efficiency-quality tradeoffs using IHW are presented. The first methodology is used to apply fidelity-compromising transformations at the algorithmic level. The second methodology is for choosing IHW ALUs at the RTL level. They are fundamentally different from traditional circuit optimization methodologies in that they possess quality awareness and are capable of sacrificing quality for higher efficiency. Both methodologies can solve constraint-based and cost function-based optimization problems. Experiments on real-world applications have shown that the proposed methodology can achieve comparable results to exhaustive search but is orders-of-magnitude faster.